Libraries
Class Ec618
extends Object
Helpers for EC618 pin addressing and peripheral construction.
All pin indices used by Toit on the EC618 are physical pad numbers. Silkscreens and datasheets often use logical GPIO numbers, for which gpio provides a convenience conversion.
Class summary
| pad num/int --input/bool= --output/bool= --pull-up/bool= --pull-down/bool= --open-drain/bool= --value/int= -> Pin | |
|---|---|
| gpio num/int --alt/bool= --input/bool= --output/bool= --pull-up/bool= --pull-down/bool= --open-drain/bool= --value/int= -> Pin | |
| uart0 --mapping/int= --rts-enabled/bool= --cts-enabled/bool= --tx-disabled/bool= --rx-disabled/bool= --baud-rate/int --data-bits/int= --stop-bits/StopBits= --parity/int= --mode/int= --rs485-de/int= --large-buffers/bool= -> Port | Opens UART0 (EC618 controller 0). |
| uart1 --mapping/int= --rts-enabled/bool= --cts-enabled/bool= --tx-disabled/bool= --rx-disabled/bool= --baud-rate/int --data-bits/int= --stop-bits/StopBits= --parity/int= --mode/int= --rs485-de/int= --large-buffers/bool= -> Port | Opens UART1 (EC618 controller 1, the only one that can wake the chip from deep sleep at low baud rates). |
| uart2 --mapping/int= --tx-disabled/bool= --rx-disabled/bool= --baud-rate/int --data-bits/int= --stop-bits/StopBits= --parity/int= --mode/int= --rs485-de/int= --large-buffers/bool= -> Port | Opens UART2 (EC618 controller 2). UART2 has no hardware flow control. |
| i2c0 --frequency/int= --pull-up/bool= -> Bus | Opens the I2C0 bus. |
| i2c1 --frequency/int= --pull-up/bool= -> Bus | Opens the I2C1 bus. |
| spi0 -> Bus | Opens the SPI0 bus (master). |
| spi1 -> Bus | Opens the SPI1 bus (master). |
| adc0 --max-voltage/float= -> Adc | Opens ADC channel 0 — the EC618's AIO3 input (the board's "ADC0"). |
| adc1 --max-voltage/float= -> Adc | Opens ADC channel 1 — the EC618's AIO4 input (the board's "ADC1"). |
Statics
Opens ADC channel 0 — the EC618's AIO3 input (the board's "ADC0").
The EC618's application ADC inputs are dedicated analog channels (AIO3/AIO4), not GPIO pads, so they are addressed by channel rather than by a Pin (see adc.Adc.channel). max-voltage selects the smallest internal range that covers it (up to 3.8 V) for the best resolution; null uses the widest range.
Opens ADC channel 1 — the EC618's AIO4 input (the board's "ADC1").
gpio num/int --alt/bool=false --input/bool=false --output/bool=false --pull-up/bool=false --pull-down/bool=false --open-drain/bool=false --value/int=0 -> Pin
Defaults to the primary ALT0 pad of that GPIO. Pass alt to address its alternate ALT4 pad where one exists. The returned Pin still uses the physical PAD number as its unique identity.
Opens the I2C0 bus.
SDA=PAD14, SCL=PAD13 — the module pins labelled I2C0_SDA/I2C0_SCL (peripheral-routed at iomux function 2; as GPIOs the same pads are GPIO15/GPIO14 at function 4).
If pull-up is true, the pads' internal pull-ups are enabled. Most sensor breakouts carry their own bus pull-ups.
frequency is an upper bound. Values below about 49kHz are rejected. Requests of 400kHz or more use the controller's bounded fast-mode setting. Devices do not support a custom hardware clock-stretch timeout; use
with-timeout to bound an operation.Opens the I2C1 bus.
SDA=PAD23, SCL=PAD24 (GPIO8/GPIO9) — the module's I2C1/SPI0 pins; one peripheral at a time.
If pull-up is true, the pads' internal pull-ups are enabled.
frequency is an upper bound. Values below about 49kHz are rejected. Requests of 400kHz or more use the controller's bounded fast-mode setting. Devices do not support a custom hardware clock-stretch timeout; use
with-timeout to bound an operation.pad num/int --input/bool=false --output/bool=false --pull-up/bool=false --pull-down/bool=false --open-drain/bool=false --value/int=0 -> Pin
Use this when the chip's PAD index is what you have. For most boards silkscreens don't label PADs directly; in that case prefer gpio.
Opens the SPI0 bus (master).
MOSI=PAD24, MISO=PAD25, CLK=PAD26 — shared with I2C1 and UART2; one peripheral at a time. Chip-select is a plain GPIO passed per device (see spi.Bus.device).
Opens the SPI1 bus (master).
MOSI=PAD28, MISO=PAD29, CLK=PAD30 — shared with UART0, so this is unusable while UART0 is the console. Accepted but untested.
uart0 --mapping/int=0 --rts-enabled/bool=false --cts-enabled/bool=false --tx-disabled/bool=false --rx-disabled/bool=false --baud-rate/int --data-bits/int=8 --stop-bits/StopBits=uart.Port.STOP-BITS-1 --parity/int=uart.Port.PARITY-DISABLED --mode/int=uart.Port.MODE-UART --rs485-de/int=null --large-buffers/bool=null -> Port
Opens UART0 (EC618 controller 0).
Default mapping (0): TX=PAD30, RX=PAD29 (the chip's debug / firmware-download UART on most modules; data on these pads also travels through the bootloader at chip reset; the pads have no GPIO function). With rts-enabled or cts-enabled, RTS=GPIO12 and CTS=GPIO13.
Alternate mapping (1): TX=GPIO17, RX=GPIO16. No hardware flow control on this mapping.
Set tx-disabled or rx-disabled to leave the corresponding pad free for general-purpose IO; address it via gpio with the appropriate GPIO number.
Note: UART0 is normally the print/console UART of the Toit firmware. Constructing this then fails with "ALREADY_IN_USE", unless the firmware was built with CONFIG_TOIT_EC618_ALLOW_PRINT_UART_REUSE (then the port adopts the console: reads/writes share the wire with
print output — this is how the HW-test agent serves its control protocol), with CONFIG_TOIT_EC618_PRINT_UART=0, or with the redirect pointed elsewhere via the anchor record's console byte.With mode equal to uart.Port.MODE-RS485-HALF-DUPLEX, pass the RS485 direction (DE) pin as rs485-de; any GPIO-capable pad works.
uart1 --mapping/int=0 --rts-enabled/bool=false --cts-enabled/bool=false --tx-disabled/bool=false --rx-disabled/bool=false --baud-rate/int --data-bits/int=8 --stop-bits/StopBits=uart.Port.STOP-BITS-1 --parity/int=uart.Port.PARITY-DISABLED --mode/int=uart.Port.MODE-UART --rs485-de/int=null --large-buffers/bool=null -> Port
Opens UART1 (EC618 controller 1, the only one that can wake the chip from deep sleep at low baud rates).
TX=GPIO19 and RX=GPIO18 on both mappings. Mapping 0 provides RTS=GPIO16 and CTS=GPIO17. Mapping 1 has no RTS and selects the alternate CTS pad on GPIO11; use it when your module only exposes that CTS route.
Note on UART1: the chip's mask ROM emits a complete "^boot.rom..." banner on UART1 at every reset, before application software runs. The banner has no trailing newline and cannot be suppressed, so a line-oriented receiver should discard it before accepting application traffic.
uart2 --mapping/int=0 --tx-disabled/bool=false --rx-disabled/bool=false --baud-rate/int --data-bits/int=8 --stop-bits/StopBits=uart.Port.STOP-BITS-1 --parity/int=uart.Port.PARITY-DISABLED --mode/int=uart.Port.MODE-UART --rs485-de/int=null --large-buffers/bool=null -> Port
Opens UART2 (EC618 controller 2). UART2 has no hardware flow control.
Mapping selector mapping picks between pin layouts:
- 0 (default): TX=GPIO11, RX=GPIO10.
- 1: TX=GPIO13, RX=GPIO12 (the layout Air780EG/EUG modules use, because GPIO10/11 are taken by their GNSS subsystem).
With mode equal to uart.Port.MODE-RS485-HALF-DUPLEX, rs485-de is the RS485 direction (DE) pin: the driver raises it just before a transmission starts and drops it once the last bit has left the shift register. Unlike the fixed RTS/CTS routings, ANY GPIO-capable pad can serve as DE (it is driven as a plain GPIO), so it is passed as a physical PAD number. Required in RS485 mode; rejected otherwise.
Methods
Whether this object is equal to the other.
Inheritance
Classes overwrite this operator to get an equality specific to their needs. Equality operators often compare the type and field contents. For example:
class Pin:
number/int
constructor .number:
operator == other:
if other is not Pin: return false
return number == other.number
A class doesn't have to follow the above format, but it must keep the operator in sync with any
hash-code method. That is, if a class has a hash-code member, then the equality and hash-code must agree. If two instances are equal (a == b), then their hash codes must also be equal (a.hash-code == b.hash-code).